Latch

Configurable latch.


Properties:

Property: (default value)

Main:

  • Input Size: (8 Channels)
    Number of channels.

  • Trigger Type: (Enable)
    "Clock" triggers every active edge.
    "enable" any change during active state.
    "None" hides Clock pin.

  • Invert Outputs: (no)
    Invert output pins.

  • Tristate: (yes)
    If yes, creates an enable pin (active Low).
    When disabled, output is high impedance.

Electric:

Inputs:

Inputs:

  • Low to High Threshold: (2.5 V)
    Voltage to change from Low to High logic state.

  • High to Low Threshold: (2.5 V)
    Voltage to change from High to Low logic state.

  • Input Impedance: (1e+9 Ω)
    Impedance of digital input.

Outputs:

Outputs:

  • Output High Voltage: (5 V)
    Voltage of output High state.

  • Output Low Voltage: (0 V)
    Voltage of output Low state.

  • Output Impedance: (1e+9 Ω)
    Impedance of digital output.

Edges:

Edges:

  • Initial High State: (no)
    Start simulation with High state output.

  • Propagation Delay: ( 10 ns)
    Time from input change to output change.

  • Rise Time: (3 ns)
    Time from 0 V to output high V.

  • Fall Time: (4 ns)
    Time from output high V to 0 V.

#Component